Quadric

Quadric is a semiconductor IP company that builds a licensable, general‑purpose neural processing unit (GPNPU) called Chimera to enable flexible, high‑efficiency on‑device AI inference across edge and embedded systems[2][6].

High‑Level Overview

Quadric delivers programmable AI processor intellectual property (IP) — the Chimera GPNPU — that licensees integrate into system‑on‑chip (SoC) designs to run ML inference and traditional DSP/control code on the same core, from low‑power edge devices to high‑performance automotive and AI PC applications[2][6]. Quadric positions Chimera as a “design once, update forever” blueprint that supports a wide range of model types (CNNs, vision transformers, LLM inference, etc.) and scales from single TOPS to hundreds of TOPS (the company reports configurations up to ~800 TOPS/1 TOPS–hundreds of TOPS range), making it useful for automotive ADAS, industrial sensors, robotics, consumer devices and AI PCs[2][1][4]. Quadric began delivering licensable IP products in 2022 and moved to product deliveries in 2023, with subsequent generational updates (third‑gen Chimera and automotive safety variants) and many hardware configurations to match customer needs[2].

Origin Story

Quadric was founded in the mid‑2010s (commonly cited founding years: 2016) to tackle the limitation of fixed‑function NPUs and fragmented heterogeneous SoC stacks; it initially proved its architecture with a test chip in 2021 and released its first licensable GPNPU in November 2022, followed by product deliveries in Q2 2023[2][3]. The company has headquarters and engineering presence tied to California and New Mexico (company materials list Burlingame, CA and earlier press mentions Albuquerque), and raised multiple funding rounds to advance its IP roadmap, including a Series B funding event to expand platform scope[2][4]. Early traction included design wins across performance ranges and industry recognition (industry awards for Edge AI IP in 2025)[2][4].

Core Differentiators

• Unified GPNPU architecture: Chimera is presented as a single programmable core that runs both ML graphs and full C++ code (pre/post‑processing, DSP, control), avoiding the need to split workloads across separate NPU + DSP + CPU islands[6][4].
• Full programmability and future‑proofing: The processor is advertised as *general‑purpose*, able to run existing model families (CNNs, ViTs, LLM inference) and adapt to future models via software, which targets customers building proprietary/custom models who don’t want fixed‑function limitations[1][6].
• Broad scalability and configurability: Quadric markets hundreds to thousands of Chimera hardware configurations that scale across a wide TOPS range to meet power, cost, and performance tradeoffs for varied end markets such as automotive, robotics, industrial, and consumer electronics[2].
• Developer tooling and ecosystem: Quadric provides a Chimera SDK and a cloud‑based DevStudio to develop, simulate, profile, and deploy ML graphs and C++ code together, reducing porting time and system complexity for licensees[6][3].
• IP licensing model and safety variants: Quadric licenses processor IP (not finished chips) so semiconductor and systems companies can integrate Chimera into custom SoCs; they’ve introduced automotive safety‑grade variants to address safety‑critical applications[2].

Role in the Broader Tech Landscape

Quadric rides several converging trends: the shift of AI from cloud to edge, growing demand for on‑device inference (for latency, privacy, cost and reliability), and the proliferation of custom/proprietary models that require flexible, programmable accelerators rather than fixed‑function NPUs[2][6][1]. Timing matters because modern model diversity (vision transformers, LLMs and model customization) increases the risk that rigid NPUs become obsolete, creating an opening for general‑purpose, software‑defined processors that can be updated after tape‑out[6][1]. Market forces in Quadric’s favor include rising unit volumes of AI‑enabled consumer and automotive devices, stronger OEM desire to control model IP, and the economics of licensing IP vs. developing a full in‑house accelerator. By offering a single core that handles ML and DSP/control, Quadric aims to reduce SoC complexity and shorten time‑to‑market for licensees, influencing SoC design patterns where unified ML/DSP programmability becomes a competitive differentiator[6][2][4].

Quick Take & Future Outlook

What’s next: Quadric is likely to continue expanding Chimera’s performance envelope, increasing certified configurations (including safety‑certified automotive variants), and growing design wins with semiconductor and systems licensees who need flexible on‑device AI[2][4]. Trends that will shape Quadric’s path include continued model fragmentation (driving demand for programmability), growth in on‑device LLM inference and multimodal workloads (raising TOPS and memory bandwidth requirements), and competitive pressure from other IP vendors and integrated SoC suppliers that may offer alternative approaches. If Quadric sustains design wins and the DevStudio ecosystem matures, the company could tilt SoC architects toward unified GPNPU integration as a mainstream approach for future edge AI chips[6][2].

Quick reminder: this profile synthesizes Quadric’s public company materials and industry coverage describing the Chimera GPNPU, its product timeline, and positioning as an IP licensor for on‑device AI inference[2][6][4].